VLSI Design Laboratory (Praktikum Rechnergestützter Systementwurf)

Vortragende/r (Mitwirkende/r)
Nummer840568771
ArtPraktikum
Umfang4 SWS
SemesterWintersemester 2018/19
UnterrichtsspracheEnglisch
Stellung in StudienplänenSiehe TUMonline

Termine

Teilnahmekriterien & Anmeldung

Siehe TUMonlineTUMOnline

Lernziele

At the end of the module students are capable of designing a complex, hierachical digital circuit in VHDL using industry-relevant design software. They achieve this by designing the control module of a MP3 player in this laboratory. The design is realized in an FPGA. As a result of the laboratory, the students can demonstrate a working prototype of the MP3 player. The students are familiar with: functional verification by behavioral simulations; complete FPGA design flow, including synthesis, map, P&R and hardware test.

Beschreibung

Design of a MP3 player. Specific contents and tasks: synchronous digital circuit concept; VHDL description of sequential and combinational logic cells; basic components of digital circuits; state machines; VHDL simulation; VHDL synthesis; FPGA design flow; FPGA implementation and test.

Inhaltliche Voraussetzungen

Basic knowledge of digital circuits and HDL design; VHDL knowledge. The following modules are recommended before taking our lab: - HDL Design Laboratory (in English) - Praktikum Systementwurf mit VHDL (in German)

Lehr- und Lernmethoden

The following kinds of media are used: (1) Laboratory notes with detailed descriptions of tasks and tool environments; (2) Individual discussions with advisor. Lernmethode: In addition to the individual methods of the students consolidated knowledge is acquired by providing subtasks of increasing complexity and difficulty in the laboratory notes. Lehrmethode: Students are free to work on their own, according to their own schedule, on the laboratory tasks. Students can work on the laboratory either in institute rooms, or remotely from another site, e.g., from home. An adviser is available who will support them in case of significant difficulties.

Empfohlene Literatur

Books: (1) The Designer's Guide to VHDL, Peter J. Ashenden; (2) The Design Warrior's Guide to FPGAs, Clive Maxfield. Online resources: (1) http://www.vhdl-online.de/; (2) http://tams-www.informatik.uni-hamburg.de/vhdl/vhdl.html.

Links